1. Field of the Invention
This invention relates to selective area platinum film deposition on substrates, and more particularly to patterned deposition of platinum films by low pressure CVD methods.
2. Description of the Related Art
To date, processes for selective area metallization on substrates have been developed for a number of metals, including tungsten, aluminum, and copper. These three metals are widely used in the computer chip industry for microelectronic fabrication (VLSI and ULSI fabrication).
It is desired to develop processes for selective area metallization with platinum. Because of its high corrosion resistance, platinum microelectronic devices are desired in applications where great reliability is desired (e.g. medical implants) and in applications exposed to corrosive environments (e.g. chemical plants).
It is also desired to make these processes as simple as possible, and to permit the removal of the masking material without the need to protect the deposited platinum.
SiO.sub.2 patterning for selective metallization is known. To use a SiO.sub.2 pattern to define selected areas for metallization, it is necessary to produce a SiO.sub.2 layer by thermal oxidation or some CVD process. It is then necessary remove the SiO.sub.2 by a selective etching step that does not attack the metal, a complex process.